1. Field of the Invention
This invention relates to a data processing device which includes a sequential circuit. Such a data processing device is used, for example, as a multiplexer circuit of a carrier transmission system, such as Network Node Interface standardized by the CCITT, in achieving frame synchronization and in executing pointer processing. The carrier transmission system is used in any one of wired, radio, and optical communications.
2. Description of the Related Art
For use as a device input signal, a combination of input data signals of first through P-th channels is supplied to a data processing device of the type described, where P represents a multiplexity of the device input signal by an integer which is not less than two. The data processing device is for processing the input data signals into output data signals of the first through the P-th channels and is for producing the output data signals collectively as a device output signal. In each of the device input and output signals, the data signals are multiplexed on or along a time axis, usually hierarchically or stratificationally in practice.
In the manner which will later be described in more detail, a conventional data processing device of this type comprises a demultiplexer for demultiplexing the device input signal into demultiplexed data signals of the first through the P-th channels. First through P-th data processing arrangements are for processing the demultiplexed data signals into the output data signals. A multiplexer multiplexes the output data signals into the device output signal.
Each data processing arrangement comprises a primary data processing unit or circuit for processing a pertinent one of the demultiplexed data signals into a primary processed output signal. A primary sequential circuit or unit processes the primary processed output signal into a sequenced signal. A secondary data processing unit processes a circuit input signal into a secondary processed output signal. The sequenced signal is supplied from the primary sequential unit to the secondary data processing unit as the circuit input signal. A secondary sequential unit processes the secondary processed output signal into a relevant one of the output data signals.
The conventional data processing device must therefore comprise the demultiplexer and the multiplexer. In addition, the conventional data processing device must comprise the data processing arrangements, equal in number to the multiplexity of the device input signal. This undesirably raises power consumption of the data processing device and results in an objectionably wide chip area when the data processing device is implemented by a semiconductor integrated circuit. The wide chip area gives rise to a low yield of the integrated circuit. Inasmuch as the sequential circuits are included, a large-scaled test circuit is indispensable to individually test the sequential units and the data processing units.